As is well known, an advanced television (ATV) system is provided with a vestigial sideband (VSB) demodulator for demodulating a VSB television signal transmitted from a transmitter which employs a VSB modulation technique.
Basic components of a VSB demodulator include a tuner module having a tuner, an analog/digital (A/D) converter and an automatic gain controller (AGC), a VSB carrier recovery circuit and a VSB timing recovery circuit. Specifically, a VSB television signal having a plurality of symbol data is received by the tuner via an antenna to selectively receive a VSB signal which corresponds to a channel selected by a user. The VSB signal received by the tuner is then digitized by the A/D converter according to a certain sampling rate to provide a digitized VSB signal to the AGC.
At the AGC, the gain of the digitized VSB signal is adjusted to a predetermined level and the digitized VSB signal so adjusted is then provided to the VSB carrier recovery circuit. At the VSB carrier recovery circuit, a carrier recovery operation on the adjusted digitized VSB signal is carried out. Specifically, a pilot tone is first extracted from the adjusted digitized VSB signal by a band pass filter and then applied to a phase locked loop (PLL) circuit to obtain a recovered carrier signal. The recovered carrier signal is then delivered to a next processor, e.g., an equalizer, for further processing thereof.
In the meantime, the VSB timing recovery circuit receives the VSB television signal and performs, on a symbol data basis, a timing recovery operation thereon so as to control the sampling rate of the A/D converter. By controlling the sampling rate, the symbol rate of the VSB television signal can be synchronized with the rate of a clock in the transmitter.
One of the conventional VSB demodulators incorporating therein a VSB timing recovery circuit is disclosed in U.S. Pat. No. 5,673,293. The VSB timing recovery circuit disclosed therein includes a voltage control oscillator (VCXO), a digital to analog (D/A) converter, and a VSB timing recovery module which has a synchronization (SYNC) detector/locator, a discriminator circuit, a switch and a PLL circuit. Specifically, the SYNC detector/locator receives a real passband VSB signal and detects a timing SYNC signal therefrom. When the timing SYNC signal is detected from the real passband VSB signal received, a switch control signal is issued from the SYNC detector/locator to the switch to close it. In response to the switch control signal, an output from the discriminator is coupled to the PLL circuit through the switch to extract a VSB symbol timing signal therefrom. Thereafter, the VSB symbol timing signal is provided to the A/D converter through the D/A converter and the VCXO for use in digitizing the VSB television signal.
In the conventional VSB timing recovery device, however, the timing recovery operation on each of the symbol data included in the VSB television signal is carried out only when the timing SYNC signal is detected, thereby resulting in a prolonged process time for the whole timing recovery of the VSB television signal.